Eine Ethernet-Karte für Minimal-Latenz bei der Verarbeitung von Datenpaketen in Gigabit-Ethernets für High Frequency-Trading. Das Teil hat den ganz wunderbaren Spitznamen „Son of Godzilla's Bad Hair Day“.
With direct data feeds such as NASDAQ ITCH and OUCH the DNPCIe_10G_K7_LL_QSFP+ contains all of the basic functions required to minimize the amount of time it takes to receive Ethernet packets, process them, and respond deterministically. By using the FPGA to process Ethernet packets, the processor and operating system are removed from the critical path and traditional sources of latency such as interrupts and context switching no longer hinder performance. Not a single clock cycle. For algorithms requiring processing, FPGA resources can be hard coded to perform the task. This includes real-time Monte Carlo analysis, and floating point.